In modern memory devices, read access time is an important timing parameter that limits the overall cycle times of the memory devices. Read access time is generally determined as a sum of the time required to generate a word line signal, the time required to discharge the bit line, the time required to sense a signal developed on the bit line, and the time required to transfer accessed data to a read output port. While there have been several techniques proposed for reducing the read access time of a memory, such techniques have not been successful in achieving a sufficient improvement in memory cycle time.